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5th AAA Workshop on Algorithm Architecture "Adequation"

January 26-28, 2000

Rocquencourt, France

Mathematics

Host: INRIA
Sponsor: INRIA and GDR/PRC ISIS
Homepage: http://www-rocq.inria.fr/syndex/AAA2000/

Organizers: Y. Sorel (Chair, Organizing Committee, GDR/PRC ISIS, INRIA Rocquencourt), D. Demigny, C. Demars, E. Martin

Deadline for abstracts: September 01, 1999

Description:
Topics: Methods for AAA: Tools - Rapid prototyping - Implementations optimizations - Software/hardware co-design - CAD tools - Specific and programmable circuit synthesis - Formal models and transformations - Languages and formal Proofs - Estimation and performance measurements New technologies - ASIP (Application Specific Integrated Processor) - IP (Intellectual Properties) for integrated circuit - SOC (System On Chip) - Dynamically reconfigurable systems - Microsystems - MEMS (MicroElectroMechanical Systems) - Heterogeneous architectures - Asynchronous circuits (self-timed) - Analog circuits and mixed analog-digital circuits - Smart sensors and actuators AAA Applications: - Algorithm influence on architecture - Architecture influence on algorithm - User and designer experiences

Date received: October 09, 1999

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